신호등 모듈인데 오류좀 잡아주세요... 글구 여기에 맞는 testbench도 부탁드려요

[Draco]

module tb_traffic_light;

//////////////////////////////////////////////////////////////////////////////
//  input/output port declaration start !!!
//////////////////////////////////////////////////////////////////////////////

  reg  clk;
  wire  [2:0]pedLight;
  // *************************************************************************************************
//                                                TestBench
//1)Constrained-random stimulus-->|--->Stimulus Vector (C-based)     --> DUT  |--> Out Vector --|
//Test Pattern File -> Waveform generation |--->      Reference Vector  |-->      |--> Comparision Result(out file)
//                                  Simulation Engine => UCDB => Report Generator => Coverage Metrics
//3)Layered testbench using tranactors,4)Common testbench for all tests,5)Test-specific code kept separate from testbench
//Check for correctness => Measure progress against the overall verfication goals.
//Submit(Functional Verifiication)=>Bronze(Functional testcases)=>Silever (all testcases)=>Gold(coverage guide line
//To_Synthesis(Silver or Gold) => To_Layout(Gold) => Version_MN =>ON_YYMMDD
// *************************************************************************************************

//////////////////////////////////////////////////////////////////////////////////
//  Instantiation of device to test design file(Device Under Test)
//  Connecting the Testbench and Design                                         //
//  1) Separating the Testbench and Design                                      //
//  2) Using an Interface to simplify Connections                               //
//////////////////////////////////////////////////////////////////////////////////
traffic_light DUT (.*) ;

 always #10
   begin
  clk=~clk;
   end

 
//////////////////////////////////////////////////////////////////////////////
//  apply stimulus signals in acyclic statements by user 
 initial
   begin
           clk='b0; DUT.next_state=4'b0000;
         
   end

///////////////////////////////////////////////////////////////////////////////////////
//   Monitor Response and Verify Outputs (stimulus signals and response signals!!!)  //
// event e1;
//   $display();
//    ->e1;

///////////////////////////////////////////////////////////////////////////////////////

 initial
   begin
       $monitor ("               clk = %b,",$time,clk );

   end

//////////////////////////////////////////////////////////////////////////////
//                    Dump Signals ,VCD(Value Change Dump                   //
//////////////////////////////////////////////////////////////////////////////

 initial
   begin
 /*
 #0 $dumpfile ("filename.dump");
 #0 $dumpvars; //select signals for recording
 #0 $dumpon;   //start recording again
 #0 $dumpall;  // Record the values of all recorded signals
 #1000 $dumpoff; // stop record
 #10 $stop;
 */

   end

//////////////////////////////////////////////////////////////////////////////
//                         User Task Push,Pop for Fifo                      //
//////////////////////////////////////////////////////////////////////////////

// task push (input [7:0] in);
// #0   write='1;  data_in=in;
// #100 write='0;
// endtask;
// task pop ();
// #0   read='1;
// #100 read='0;
// endtask;
endmodule